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The schedule is subject to change, so please check back before the event for the most up to date information.

Please note that all session times are listed below in Central European Summer Time (CEST), UTC +2.
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Friday, September 5
 

08:30 CEST

Registration
Friday September 5, 2025 08:30 - 09:00 CEST
Foyer
Friday September 5, 2025 08:30 - 09:00 CEST
Foyer
  Registration

09:00 CEST

Keynote
Friday September 5, 2025 09:00 - 09:50 CEST
CD Ballroom
Speakers
SJ

Sebastian Jester

Cyberagentur
Friday September 5, 2025 09:00 - 09:50 CEST
CD Ballroom
  Keynote Session

09:00 CEST

Expo Hall
Friday September 5, 2025 09:00 - 13:30 CEST
Friday September 5, 2025 09:00 - 13:30 CEST
  Expo Hall

09:50 CEST

Announcements
Friday September 5, 2025 09:50 - 10:00 CEST
CD Ballroom
Speakers
JA

June Andronick

seL 4 Foundation
Friday September 5, 2025 09:50 - 10:00 CEST
CD Ballroom
  General Session

10:00 CEST

Break
Friday September 5, 2025 10:00 - 10:30 CEST
Foyer
Friday September 5, 2025 10:00 - 10:30 CEST
Foyer
  Break

10:30 CEST

Demystifying the seL4 Specification
Friday September 5, 2025 10:30 - 11:30 CEST
CD Ballroom
Speakers
avatar for Matt Brecknell

Matt Brecknell

Verification Engineer, Kry10
Matthew is a formal verification practitioner. He has made significant contributions to the seL4 verification story, and is a member of the seL4 Foundation Technical Steering Committee. At Kry10, Matthew is developing the next generation of high-assurance remotely-managed seL4-based... Read More →
MP

Mathieu Paturel

UNSW Sydney
Friday September 5, 2025 10:30 - 11:30 CEST
CD Ballroom
  Deep Dive

11:30 CEST

A Deep Dive into seL4’s Binary Verification Story
Friday September 5, 2025 11:30 - 12:00 CEST
CD Ballroom
Speakers
avatar for Nick Spinale

Nick Spinale

Collas Group
Friday September 5, 2025 11:30 - 12:00 CEST
CD Ballroom
  Presentation Session

12:00 CEST

Lunch
Friday September 5, 2025 12:00 - 13:30 CEST
Restaurant
Friday September 5, 2025 12:00 - 13:30 CEST
Restaurant
  Break

13:30 CEST

BoFs
Friday September 5, 2025 13:30 - 14:15 CEST
BCD Ballroom
Friday September 5, 2025 13:30 - 14:15 CEST
BCD Ballroom
  Panel Discussions and Birds of a Feather

14:15 CEST

BoFs
Friday September 5, 2025 14:15 - 15:00 CEST
BCD Ballroom
Friday September 5, 2025 14:15 - 15:00 CEST
BCD Ballroom
  Panel Discussions and Birds of a Feather

15:00 CEST

BoF Wrap-up
Friday September 5, 2025 15:00 - 15:15 CEST
CD Ballroom
Speakers
RV

Robert VanVossen

Embedded Systems Engineer, Dornerworks
I am an embedded systems engineer at DornerWorks in Grand Rapids, Michigan. I have done work with ARINC653 extensions for the Xen Hypervisor. I am also involved with providing support for Xen on the Xilinx Zynq Ultrascale+ MPSoC.I co-presented at the 2014 Xen Developer's Summit.
Friday September 5, 2025 15:00 - 15:15 CEST
CD Ballroom
  Panel Discussions and Birds of a Feather

15:15 CEST

Concluding Remarks
Friday September 5, 2025 15:15 - 15:30 CEST
CD Ballroom
Speakers
RV

Robert VanVossen

Embedded Systems Engineer, Dornerworks
I am an embedded systems engineer at DornerWorks in Grand Rapids, Michigan. I have done work with ARINC653 extensions for the Xen Hypervisor. I am also involved with providing support for Xen on the Xilinx Zynq Ultrascale+ MPSoC.I co-presented at the 2014 Xen Developer's Summit.
Friday September 5, 2025 15:15 - 15:30 CEST
CD Ballroom
  General Session
 

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BCD Ballroom
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Foyer
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  • Break
  • Deep Dive
  • Expo Hall
  • General Session
  • Keynote Session
  • Panel Discussions and Birds of a Feather
  • Presentation Session
  • Registration